mirror of
https://github.com/partic2/libffi
synced 2026-11-10 18:17:19 +00:00
This patch enables FFI Go Closure on AIX.
This commit is contained in:
Tony Reix
+239
-1
@@ -106,6 +106,10 @@ ffi_call_AIX:
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.llong .ffi_call_AIX, TOC[tc0], 0
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.csect .text[PR]
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.ffi_call_AIX:
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.function .ffi_call_AIX,.ffi_call_AIX,16,044,LFE..0-LFB..0
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.bf __LINE__
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.line 1
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LFB..0:
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/* Save registers we use. */
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mflr r0
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@@ -115,8 +119,10 @@ ffi_call_AIX:
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std r31, -8(r1)
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std r0, 16(r1)
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LCFI..0:
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mr r28, r1 /* our AP. */
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stdux r1, r1, r4
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LCFI..1:
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/* Save arguments over call... */
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mr r31, r5 /* flags, */
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@@ -202,12 +208,16 @@ L(fp_return_value):
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L(float_return_value):
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stfs f1, 0(r30)
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b L(done_return_value)
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LFE..0:
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#else /* ! __64BIT__ */
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.long .ffi_call_AIX, TOC[tc0], 0
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.csect .text[PR]
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.ffi_call_AIX:
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.function .ffi_call_AIX,.ffi_call_AIX,16,044,LFE..0-LFB..0
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.bf __LINE__
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.line 1
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LFB..0:
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/* Save registers we use. */
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mflr r0
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@@ -217,8 +227,10 @@ L(float_return_value):
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stw r31, -4(r1)
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stw r0, 8(r1)
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LCFI..0:
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mr r28, r1 /* out AP. */
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stwux r1, r1, r4
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LCFI..1:
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/* Save arguments over call... */
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mr r31, r5 /* flags, */
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@@ -304,11 +316,144 @@ L(fp_return_value):
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L(float_return_value):
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stfs f1, 0(r30)
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b L(done_return_value)
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LFE..0:
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#endif
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.ef __LINE__
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.long 0
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.byte 0,0,0,1,128,4,0,0
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/* END(ffi_call_AIX) */
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/* void ffi_call_go_AIX(extended_cif *ecif, unsigned long bytes,
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* unsigned int flags, unsigned int *rvalue,
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* void (*fn)(),
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* void (*prep_args)(extended_cif*, unsigned *const),
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* void *closure);
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* r3=ecif, r4=bytes, r5=flags, r6=rvalue, r7=fn, r8=prep_args, r9=closure
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*/
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.csect .text[PR]
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.align 2
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.globl ffi_call_go_AIX
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.globl .ffi_call_go_AIX
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.csect ffi_call_go_AIX[DS]
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ffi_call_go_AIX:
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#ifdef __64BIT__
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.llong .ffi_call_go_AIX, TOC[tc0], 0
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.csect .text[PR]
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.ffi_call_go_AIX:
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.function .ffi_call_go_AIX,.ffi_call_go_AIX,16,044,LFE..1-LFB..1
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.bf __LINE__
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.line 1
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LFB..1:
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/* Save registers we use. */
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mflr r0
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std r28,-32(r1)
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std r29,-24(r1)
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std r30,-16(r1)
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std r31, -8(r1)
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std r9, 8(r1) /* closure, saved in cr field. */
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std r0, 16(r1)
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LCFI..2:
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mr r28, r1 /* our AP. */
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stdux r1, r1, r4
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LCFI..3:
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/* Save arguments over call... */
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mr r31, r5 /* flags, */
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mr r30, r6 /* rvalue, */
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mr r29, r7 /* function address, */
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std r2, 40(r1)
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/* Call ffi_prep_args. */
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mr r4, r1
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bl .ffi_prep_args
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nop
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/* Now do the call. */
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ld r0, 0(r29)
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ld r2, 8(r29)
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ld r11, 8(r28) /* closure */
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/* Set up cr1 with bits 4-7 of the flags. */
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mtcrf 0x40, r31
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mtctr r0
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/* Load all those argument registers. */
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/* We have set up a nice stack frame, just load it into registers. */
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ld r3, 40+(1*8)(r1)
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ld r4, 40+(2*8)(r1)
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ld r5, 40+(3*8)(r1)
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ld r6, 40+(4*8)(r1)
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nop
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ld r7, 40+(5*8)(r1)
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ld r8, 40+(6*8)(r1)
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ld r9, 40+(7*8)(r1)
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ld r10,40+(8*8)(r1)
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b L1
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LFE..1:
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#else /* ! __64BIT__ */
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.long .ffi_call_go_AIX, TOC[tc0], 0
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.csect .text[PR]
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.ffi_call_go_AIX:
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.function .ffi_call_go_AIX,.ffi_call_go_AIX,16,044,LFE..1-LFB..1
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.bf __LINE__
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.line 1
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/* Save registers we use. */
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LFB..1:
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mflr r0
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stw r28,-16(r1)
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stw r29,-12(r1)
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stw r30, -8(r1)
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stw r31, -4(r1)
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stw r9, 4(r1) /* closure, saved in cr field. */
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stw r0, 8(r1)
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LCFI..2:
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mr r28, r1 /* out AP. */
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stwux r1, r1, r4
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LCFI..3:
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/* Save arguments over call... */
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mr r31, r5 /* flags, */
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mr r30, r6 /* rvalue, */
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mr r29, r7 /* function address, */
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stw r2, 20(r1)
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/* Call ffi_prep_args. */
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mr r4, r1
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bl .ffi_prep_args
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nop
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/* Now do the call. */
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lwz r0, 0(r29)
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lwz r2, 4(r29)
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lwz r11, 4(r28) /* closure */
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/* Set up cr1 with bits 4-7 of the flags. */
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mtcrf 0x40, r31
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mtctr r0
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/* Load all those argument registers. */
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/* We have set up a nice stack frame, just load it into registers. */
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lwz r3, 20+(1*4)(r1)
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lwz r4, 20+(2*4)(r1)
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lwz r5, 20+(3*4)(r1)
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lwz r6, 20+(4*4)(r1)
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nop
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lwz r7, 20+(5*4)(r1)
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lwz r8, 20+(6*4)(r1)
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lwz r9, 20+(7*4)(r1)
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lwz r10,20+(8*4)(r1)
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b L1
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LFE..1:
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#endif
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.ef __LINE__
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.long 0
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.byte 0,0,0,1,128,4,0,0
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/* END(ffi_call_go_AIX) */
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.csect .text[PR]
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.align 2
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.globl ffi_call_DARWIN
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@@ -326,3 +471,96 @@ ffi_call_DARWIN:
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.long 0
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.byte 0,0,0,0,0,0,0,0
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/* END(ffi_call_DARWIN) */
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/* EH frame stuff. */
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#define LR_REGNO 0x41 /* Link Register (65), see rs6000.md */
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#ifdef __64BIT__
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#define PTRSIZE 8
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#define LOG2_PTRSIZE 3
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#define FDE_ENCODING 0x1c /* DW_EH_PE_pcrel|DW_EH_PE_sdata8 */
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#define EH_DATA_ALIGN_FACT 0x78 /* LEB128 -8 */
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#else
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#define PTRSIZE 4
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#define LOG2_PTRSIZE 2
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#define FDE_ENCODING 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4 */
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#define EH_DATA_ALIGN_FACT 0x7c /* LEB128 -4 */
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#endif
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.csect _unwind.ro_[RO],4
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.align LOG2_PTRSIZE
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.globl _GLOBAL__F_libffi_src_powerpc_aix
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_GLOBAL__F_libffi_src_powerpc_aix:
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Lframe..1:
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.vbyte 4,LECIE..1-LSCIE..1 /* CIE Length */
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LSCIE..1:
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.vbyte 4,0 /* CIE Identifier Tag */
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.byte 0x3 /* CIE Version */
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.byte "zR" /* CIE Augmentation */
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.byte 0
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.byte 0x1 /* uleb128 0x1; CIE Code Alignment Factor */
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.byte EH_DATA_ALIGN_FACT /* leb128 -4/-8; CIE Data Alignment Factor */
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.byte 0x41 /* CIE RA Column */
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.byte 0x1 /* uleb128 0x1; Augmentation size */
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.byte FDE_ENCODING /* FDE Encoding (pcrel|sdata4/8) */
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.byte 0xc /* DW_CFA_def_cfa */
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.byte 0x1 /* uleb128 0x1; Register r1 */
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.byte 0 /* uleb128 0x0; Offset 0 */
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.align LOG2_PTRSIZE
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LECIE..1:
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LSFDE..1:
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.vbyte 4,LEFDE..1-LASFDE..1 /* FDE Length */
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LASFDE..1:
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.vbyte 4,LASFDE..1-Lframe..1 /* FDE CIE offset */
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.vbyte PTRSIZE,LFB..0-$ /* FDE initial location */
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.vbyte PTRSIZE,LFE..0-LFB..0 /* FDE address range */
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.byte 0 /* uleb128 0x0; Augmentation size */
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.byte 0x4 /* DW_CFA_advance_loc4 */
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.vbyte 4,LCFI..0-LFB..0
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.byte 0x11 /* DW_CFA_def_offset_extended_sf */
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.byte LR_REGNO /* uleb128 LR_REGNO; Register LR */
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.byte 0x7e /* leb128 -2; Offset -2 (8/16) */
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.byte 0x9f /* DW_CFA_offset Register r31 */
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.byte 0x1 /* uleb128 0x1; Offset 1 (-4/-8) */
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.byte 0x9e /* DW_CFA_offset Register r30 */
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.byte 0x2 /* uleb128 0x2; Offset 2 (-8/-16) */
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.byte 0x9d /* DW_CFA_offset Register r29 */
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.byte 0x3 /* uleb128 0x3; Offset 3 (-12/-24) */
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.byte 0x9c /* DW_CFA_offset Register r28 */
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.byte 0x4 /* uleb128 0x4; Offset 4 (-16/-32) */
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.byte 0x4 /* DW_CFA_advance_loc4 */
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.vbyte 4,LCFI..1-LCFI..0
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.byte 0xd /* DW_CFA_def_cfa_register */
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.byte 0x1c /* uleb128 28; Register r28 */
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.align LOG2_PTRSIZE
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LEFDE..1:
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LSFDE..2:
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.vbyte 4,LEFDE..2-LASFDE..2 /* FDE Length */
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LASFDE..2:
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.vbyte 4,LASFDE..2-Lframe..1 /* FDE CIE offset */
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.vbyte PTRSIZE,LFB..1-$ /* FDE initial location */
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.vbyte PTRSIZE,LFE..1-LFB..1 /* FDE address range */
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.byte 0 /* uleb128 0x0; Augmentation size */
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.byte 0x4 /* DW_CFA_advance_loc4 */
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.vbyte 4,LCFI..2-LFB..1
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.byte 0x11 /* DW_CFA_def_offset_extended_sf */
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.byte LR_REGNO /* uleb128 LR_REGNO; Register LR */
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.byte 0x7e /* leb128 -2; Offset -2 (8/16) */
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.byte 0x9f /* DW_CFA_offset Register r31 */
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.byte 0x1 /* uleb128 0x1; Offset 1 (-4/-8) */
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.byte 0x9e /* DW_CFA_offset Register r30 */
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.byte 0x2 /* uleb128 0x2; Offset 2 (-8/-16) */
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.byte 0x9d /* DW_CFA_offset Register r29 */
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.byte 0x3 /* uleb128 0x3; Offset 3 (-12/-24) */
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.byte 0x9c /* DW_CFA_offset Register r28 */
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.byte 0x4 /* uleb128 0x4; Offset 4 (-16/-32) */
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.byte 0x4 /* DW_CFA_advance_loc4 */
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.vbyte 4,LCFI..3-LCFI..2
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.byte 0xd /* DW_CFA_def_cfa_register */
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.byte 0x1c /* uleb128 28; Register r28 */
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.align LOG2_PTRSIZE
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LEFDE..2:
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.vbyte 4,0 /* End of FDEs */
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.csect .text[PR]
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.ref _GLOBAL__F_libffi_src_powerpc_aix /* Prevents garbage collection by AIX linker */
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